MWCC/includes/compiler/PCode.h

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#ifndef COMPILER_PCODE_H
#define COMPILER_PCODE_H
#include "compiler/common.h"
#include "compiler/PCodeInfo.h"
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#ifdef __MWERKS__
#pragma options align=mac68k
#endif
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#define FLAG_SET_T(flags) (((flags) & (fIsBranch | fIsCall)) ? (flags) : 0)
#define FLAG_SET_F(flags) (((flags) & (fIsBranch | fIsCall)) ? 0 : (flags))
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#define PCODE_FLAG_SET_T(pcode) ((((PCode *) (pcode))->flags & (fIsBranch | fIsCall)) ? ((PCode *) (pcode))->flags : 0)
#define PCODE_FLAG_SET_F(pcode) ((((PCode *) (pcode))->flags & (fIsBranch | fIsCall)) ? 0 : ((PCode *) (pcode))->flags)
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enum {
EffectRead = 1,
EffectWrite = 2,
Effect4 = 4,
Effect8 = 8,
Effect40 = 0x40 // spilled register?
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};
typedef enum {
RefType_0,
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RefType_1, // like D, but 32-bit?
RefType_2, // matches MW_RELOC_3?
RefType_3, // matches MW_RELOC_4?
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RefType_4,
RefType_5,
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RefType_6, // LO16?
RefType_7, // HI16?
RefType_8, // HA16?
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RefType_9,
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RefType_A, // another LO
RefType_B, // another HA
RefType_C, // another HA
RefType_D // another LO
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} PCRefType;
struct PCodeArg {
PCOpKind kind;
RegClass arg;
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union {
struct {
unsigned short effect;
short reg;
} reg;
struct {
SInt32 value;
Object *obj;
} imm;
struct {
SInt32 offset;
Object *obj;
} mem;
struct {
PCodeLabel *label;
} label;
struct {
SInt16 offset;
PCodeLabel *labelA;
PCodeLabel *labelB;
} labeldiff;
unsigned char placeholder[10]; // keep the size
} data;
};
#define PC_OP_IS_REGISTER(_op, _rclass, _reg) \
((_op)->kind == PCOp_REGISTER && \
(_op)->arg == (_rclass) && \
(_op)->data.reg.reg == (_reg))
#define PC_OP_IS_READ_REGISTER(_op, _rclass, _reg) \
((_op)->kind == PCOp_REGISTER && \
(_op)->arg == (_rclass) && \
(_op)->data.reg.reg == (_reg) && \
((_op)->data.reg.effect & EffectRead))
#define PC_OP_IS_WRITE_REGISTER(_op, _rclass, _reg) \
((_op)->kind == PCOp_REGISTER && \
(_op)->arg == (_rclass) && \
(_op)->data.reg.reg == (_reg) && \
((_op)->data.reg.effect & EffectWrite))
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#define PC_OP_IS_R_OR_W_REGISTER(_op, _rclass, _reg) \
((_op)->kind == PCOp_REGISTER && \
(_op)->arg == (_rclass) && \
(_op)->data.reg.reg == (_reg) && \
((_op)->data.reg.effect & (EffectRead | EffectWrite)))
#define PC_OP_IS_ANY_REGISTER(_op, _rclass) \
((_op)->kind == PCOp_REGISTER && \
(_op)->arg == (_rclass))
#define PC_OP_IS_READ_ANY_REGISTER(_op, _rclass) \
((_op)->kind == PCOp_REGISTER && \
(_op)->arg == (_rclass) && \
((_op)->data.reg.effect & EffectRead))
#define PC_OP_IS_WRITE_ANY_REGISTER(_op, _rclass) \
((_op)->kind == PCOp_REGISTER && \
(_op)->arg == (_rclass) && \
((_op)->data.reg.effect & EffectWrite))
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struct PCode {
PCode *nextPCode;
PCode *prevPCode;
PCodeBlock *block;
int useID;
int defID;
UInt32 flags;
struct Alias *alias;
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SInt32 sourceoffset;
short op;
short argCount;
PCodeArg args[0];
};
struct PCodeLabel {
PCodeLabel *nextLabel;
PCodeBlock *block;
short resolved;
unsigned short index;
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};
typedef struct _PCLink {
struct _PCLink *nextLink;
struct PCodeBlock *block;
} PCLink;
struct PCodeBlock {
struct PCodeBlock *nextBlock;
struct PCodeBlock *prevBlock;
PCodeLabel *labels;
PCLink *predecessors;
PCLink *successors;
PCode *firstPCode;
PCode *lastPCode;
int blockIndex;
int codeOffset; // in bytes
int loopWeight;
short pcodeCount;
unsigned short flags;
};
/* PCode Flags */
enum {
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fIsBranch = 1,
fIsRead = 2, // read from memory
fIsWrite = 4, // write to memory
fIsCall = 8,
fIsMove = 0x10, // moves register (mcrf, mr, fmr, vmr, vmrp)
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// Always valid
fIsConst = 0x40,
fIsVolatile = 0x80,
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fSideEffects = 0x100, // instructions that do weird stuff with PPC state
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fPCodeFlag200 = 0x200, // ?
fPCodeFlag400 = 0x400, // ?
fPCodeFlag800 = 0x800, // ?
fPCodeFlag1000 = 0x1000, // ?
fCommutative = 0x2000,
fIsCSE = 0x4000,
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fIsArgInit = 0x8000, // instruction that stores varargs from GPRs to the stack
fPCodeFlag20000 = 0x20000, // some kinda load?
fPCodeFlag40000 = 0x40000, // some kinda store?
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// Set 1 (branches) only
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fLink = 0x1000000,
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fCanLink = 0x2000000, // is capable of being a link branch
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fBranchNotTaken = 0x4000000,
fBranchTaken = 0x8000000,
fAbsolute = 0x10000000,
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fCanBeAbsolute = 0x20000000, // is capable of having fAbsolute set
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// Set 2 (non-branches) only
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fIsPtrOp = 0x20,
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fPCodeFlag200000 = 0x200000,
fPCodeFlag400000 = 0x400000,
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fOverflow = 0x800000,
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fUpdatesPtr = 0x2000000, // lbzu, lbzux, lwzu, stbu, stbux, etc
fCanSetCarry = 0x4000000, // is capable of having fSetsCarry set
fCanSetRecordBit = 0x8000000, // is capable of having fRecordBit set
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fSetsCarry = 0x10000000,
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fRecordBit = 0x20000000,
fOpTypeFPR = 0x40000000,
fOpTypeGPR = 0x80000000,
fOpTypeVR = 0xC0000000,
fOpTypeMask = 0xC0000000
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};
enum {
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fIsProlog = 1, // fIsProlog
fIsEpilogue = 2, // fIsEpilogue
fVisited = 4, // fVisited
fScheduled = 8, // fScheduled
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fPCBlockFlag10 = 0x10, // maybe fIsSwitch based off v3?
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fDeleted = 0x20,
fPCBlockFlag2000 = 0x2000,
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fPCBlockFlag4000 = 0x4000,
fPCBlockFlag6000 = 0x6000,
fPCBlockFlag8000 = 0x8000
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};
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// v3 has fCCisLiveOnExit, fUnrolled, fAlignBlock
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extern PCodeBlock *pcbasicblocks;
extern PCodeBlock *pclastblock;
extern PCodeBlock *prologue;
extern PCodeBlock *epilogue;
extern PCodeBlock **depthfirstordering;
extern int pcblockcount;
extern int pcloopweight;
extern void initpcode(void);
extern PCode *makepcode(Opcode op, ...);
extern void emitpcode(Opcode op, ...);
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extern PCode *copypcode(PCode *pcode);
extern PCodeLabel *makepclabel(void);
extern PCodeBlock *makepcblock(void);
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extern void pclabel(PCodeBlock *block, PCodeLabel *label);
extern void pcbranch(PCodeBlock *block, PCodeLabel *label);
extern void pccomputepredecessors(void);
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extern void deleteblock(PCodeBlock *block);
extern void deleteunreachableblocks(void);
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extern void appendpcode(PCodeBlock *block, PCode *pcode);
extern void deletepcode(PCode *pcode);
extern void insertpcodebefore(PCode *anchor, PCode *newpcode);
extern void insertpcodeafter(PCode *anchor, PCode *newpcode);
extern void setpcodeflags(int flags);
extern void clearpcodeflags(int flags);
extern int pccomputeoffsets(void);
extern void computedepthfirstordering(void);
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#ifdef __MWERKS__
#pragma options align=reset
#endif
#endif