72 Commits

Author SHA1 Message Date
4643ee0fd3 Add fsqrt(s), mfocrf, POWER aliases 2025-07-06 23:56:26 -06:00
c75d090d82 Rename crate to powerpc; support extensions 2025-07-06 22:15:08 -06:00
2204612dfb Codegen updates & instruction aliases 2025-07-06 22:15:08 -06:00
rjkiv
c540ce97ca Add VMX128 tests, D3D inst context 2025-07-06 22:14:20 -06:00
5cc2a69939 Rework split field handling; working VMX128/AltiVec 2025-07-06 22:14:19 -06:00
rjkiv
cfd00bcbc5 Initial AltiVec & VMX128 support 2025-07-06 22:14:19 -06:00
Ethan Roseman
f388c1fb73
Update CI (#2)
* Update CI

* make clippy happy

* empty last line

* matricize me, cap'n
2025-06-02 23:46:45 -06:00
Ethan Roseman
cb22723566
Add hash to Argument (#1) 2025-06-02 09:15:53 -06:00
0de65eb1b6 Reduce binary size using const arrays
Before, the mnemonic arrays would be generated
on the stack at runtime in each parse function.
This ensures that the arrays  themselves are
treated as const data.
2024-09-26 23:20:49 -06:00
c8026715f0 impl From<u8> for Opcode 2024-09-26 23:18:47 -06:00
d161deca50 Add badges to README.md & add documentation keys 2024-09-09 19:28:14 -06:00
c131108802 Add readme key to Cargo.toml 2024-09-09 19:19:58 -06:00
dbd66fae3b Use workspace.package fields & update deps 2024-09-09 19:13:44 -06:00
6cbd7d888c Resolve clippy::missing_transmute_annotations 2024-04-30 19:46:54 -06:00
d63c94c3e2 Add InsIter 2024-04-30 19:44:46 -06:00
d31bf75009 API updates and cleanup 2024-03-21 21:32:06 -06:00
c4af15ddc2 Rewrite the entire crate, add assembler
- 10x faster disassembly performance
- Nearly feature-complete assembler
- `no_std` compatible
- Relicense to MIT/Apache-2.0
- Remove old crates (dol, flow-graph, etc)
- Remove Python bindings (for now, at least)
2024-03-14 00:55:08 -06:00
f6e15052b1 Various bitmask and modifier fixes 2024-03-08 22:50:42 -07:00
4a2bbbc6f8 Derive PartialEq for Argument, pub SimplifiedIns::basic_form 2023-10-06 01:10:41 -04:00
87fe934548 Add subi mnemonics & use capstone-style CR bits 2023-10-06 01:06:50 -04:00
3a9be32f66 Fix mcrf, mcrfs, mcrxr, twi, twui 2023-01-14 13:25:40 -05:00
aa631a33de Fix clrlslwi decoding 2022-10-16 14:21:50 -04:00
4d8e473331 Support branch prediction bits, more bd mnemonics, more rlwinm mnemonics 2022-10-10 17:53:24 -04:00
20abce13e4 SPR names & mfspr/mtspr simplified mnemonics 2022-10-09 22:57:13 -04:00
ca92a30920 Improve CRBit display 2022-10-09 21:41:34 -04:00
94c87b0912 Ignore bcctr, bclr in branch_offset 2022-09-27 17:50:59 -04:00
Richard Patel
65a68166b6 cargo fmt 2022-06-09 07:30:08 +02:00
InusualZ
d23fb912b8 disasm: fix failing tests 2022-06-08 21:33:36 -04:00
InusualZ
d1c809b3f6 isa: fix ps_mr having frA as argument 2022-05-31 20:25:19 -04:00
InusualZ
3c0656ee3c isa: remove mfspr's mftdu and mttdu mnemonics since there are not recognized by the metrowerks assembler 2022-05-31 20:25:19 -04:00
InusualZ
86e081fdb2 isa: fix rlwinm's mnemonic slwi using ME instead of SH as arg 2022-05-31 20:25:19 -04:00
InusualZ
a9ae0cb8a1 isa: add RC modifier to the xor instruction 2022-05-31 20:25:15 -04:00
InusualZ
49673468fc isa: fix srw argument order 2022-05-31 20:25:08 -04:00
InusualZ
2364d17751 isa: remove RC modifier from a bunch of instruction
This modifier is not part of those instruction
2022-05-31 20:25:01 -04:00
InusualZ
7167807402 isa: fix mfcr argument 2022-05-31 20:24:54 -04:00
InusualZ
65b0966a97 isa: b and bc change modifiers order
Previously they were `modifiers: [ AA, LK ]` and this caused problems,
because the modifiers add a char to the instruction mnemonics, but this
char is position dependant.
2022-05-31 20:24:54 -04:00
InusualZ
f4389e5edd isa: add missing L arg to the cmp instruction family
Also fix the mnemonics for said instruction family
2022-05-31 20:24:36 -04:00
InusualZ
ad1ec7aaa9 isa: fix paired single instruction arguments
Argument specific to this instruction were re/named to a more dolphin
aligned name
2022-05-31 20:24:29 -04:00
InusualZ
b90b46ef8e isa: Add missing argument to bcctr and bclr 2022-05-31 20:24:29 -04:00
InusualZ
d03a713a2b genisa: cast unmasked signed value
Co-authored-by: Richard Patel <me@terorie.dev>
2022-05-31 20:24:29 -04:00
InusualZ
9fd7546916 disasm: improve branch ins helpers
`branch_dest`: Support absolute destinations
`is_branch`: Use `matches!` to improve readability
`is_direct_branch`: Added helper to better match direct branches

Co-authored-by: Richard Patel <me@terorie.dev>
2022-05-31 20:24:20 -04:00
Richard Patel
a80372c1b6 disasm: branch helpers, fix split fields 2022-04-11 00:08:39 +02:00
Richard Patel
9dab42c364 disasm-py: add fields() method 2022-04-09 17:19:05 +02:00
Richard Patel
9d5b73c0dc fix condition register logical instructions 2022-04-09 15:33:40 +02:00
Richard Patel
70192c75a4 fix psq_st disasm 2022-04-09 02:09:44 +02:00
Richard Patel
6548c6ec5d bump version to 0.2.0 2022-04-07 05:45:01 +02:00
Richard Patel
4c5735e403 more flexible modifier handling 2022-04-07 05:33:38 +02:00
Richard Patel
99c7f252f8 fix bcctr and bclr 2022-04-07 04:44:38 +02:00
Richard Patel
16f955947e fix bc opcode 2022-04-07 04:23:12 +02:00
Richard Patel
b8199e678c fix signed fields 2022-04-07 04:07:15 +02:00