49673468fc
isa: fix `srw` argument order
2022-05-31 20:25:08 -04:00
2364d17751
isa: remove `RC` modifier from a bunch of instruction
...
This modifier is not part of those instruction
2022-05-31 20:25:01 -04:00
7167807402
isa: fix `mfcr` argument
2022-05-31 20:24:54 -04:00
65b0966a97
isa: `b` and `bc` change modifiers order
...
Previously they were `modifiers: [ AA, LK ]` and this caused problems,
because the modifiers add a char to the instruction mnemonics, but this
char is position dependant.
2022-05-31 20:24:54 -04:00
f4389e5edd
isa: add missing `L` arg to the `cmp` instruction family
...
Also fix the mnemonics for said instruction family
2022-05-31 20:24:36 -04:00
ad1ec7aaa9
isa: fix paired single instruction arguments
...
Argument specific to this instruction were re/named to a more dolphin
aligned name
2022-05-31 20:24:29 -04:00
b90b46ef8e
isa: Add missing argument to `bcctr` and `bclr`
2022-05-31 20:24:29 -04:00
a80372c1b6
disasm: branch helpers, fix split fields
2022-04-11 00:08:39 +02:00
9d5b73c0dc
fix condition register logical instructions
2022-04-09 15:33:40 +02:00
70192c75a4
fix psq_st disasm
2022-04-09 02:09:44 +02:00
4c5735e403
more flexible modifier handling
2022-04-07 05:33:38 +02:00
99c7f252f8
fix bcctr and bclr
2022-04-07 04:44:38 +02:00
16f955947e
fix bc opcode
2022-04-07 04:23:12 +02:00
b8199e678c
fix signed fields
2022-04-07 04:07:15 +02:00
8a57bd9eb2
more tests
2022-04-07 02:36:49 +02:00
82970d166b
isa.yaml: use condition expressions instead of matchers
2022-04-07 01:25:20 +02:00
ea364a52d8
isa.yaml: unquote everything
2022-04-07 01:20:28 +02:00
e9041072e9
support simplified mnemonic conditions
2022-04-07 01:17:31 +02:00
c8c1daaa64
progress mnemonics
2022-04-06 17:41:13 +02:00
5431836376
switch from macro to ahead-of-time generated code
2022-04-06 15:13:55 +02:00
InusualZ
Richard Patel