Luke Street
0de65eb1b6
Reduce binary size using const arrays
...
Before, the mnemonic arrays would be generated
on the stack at runtime in each parse function.
This ensures that the arrays themselves are
treated as const data.
2024-09-26 23:20:49 -06:00
Luke Street
c8026715f0
impl From<u8> for Opcode
2024-09-26 23:18:47 -06:00
Luke Street
d161deca50
Add badges to README.md & add documentation keys
2024-09-09 19:28:14 -06:00
Luke Street
c131108802
Add readme key to Cargo.toml
2024-09-09 19:19:58 -06:00
Luke Street
dbd66fae3b
Use workspace.package fields & update deps
2024-09-09 19:13:44 -06:00
Luke Street
6cbd7d888c
Resolve clippy::missing_transmute_annotations
2024-04-30 19:46:54 -06:00
Luke Street
d63c94c3e2
Add InsIter
2024-04-30 19:44:46 -06:00
Luke Street
d31bf75009
API updates and cleanup
2024-03-21 21:32:06 -06:00
Luke Street
c4af15ddc2
Rewrite the entire crate, add assembler
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- 10x faster disassembly performance
- Nearly feature-complete assembler
- `no_std` compatible
- Relicense to MIT/Apache-2.0
- Remove old crates (dol, flow-graph, etc)
- Remove Python bindings (for now, at least)
2024-03-14 00:55:08 -06:00
Luke Street
f6e15052b1
Various bitmask and modifier fixes
2024-03-08 22:50:42 -07:00
Luke Street
4a2bbbc6f8
Derive PartialEq for Argument, pub SimplifiedIns::basic_form
2023-10-06 01:10:41 -04:00
Luke Street
87fe934548
Add subi mnemonics & use capstone-style CR bits
2023-10-06 01:06:50 -04:00
Luke Street
9ae36eef34
cargo fmt
2023-01-14 13:30:08 -05:00
Luke Street
5b022f12f1
Always build CI on push
2023-01-14 13:27:34 -05:00
Luke Street
3a9be32f66
Fix mcrf, mcrfs, mcrxr, twi, twui
2023-01-14 13:25:40 -05:00
Richard Patel
fa42bb6c9a
Merge pull request #42 from encounter/updates
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Sync @encounter's improvements
2022-11-15 03:15:35 +01:00
Richard Patel
2be94b3ced
Merge pull request #41 from encounter/branch_offset
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Ignore bcctr, bclr in branch_offset
2022-11-15 03:08:10 +01:00
Luke Street
aa631a33de
Fix clrlslwi decoding
2022-10-16 14:21:50 -04:00
Luke Street
4d8e473331
Support branch prediction bits, more bd mnemonics, more rlwinm mnemonics
2022-10-10 17:53:24 -04:00
Luke Street
20abce13e4
SPR names & mfspr/mtspr simplified mnemonics
2022-10-09 22:57:13 -04:00
Luke Street
ca92a30920
Improve CRBit display
2022-10-09 21:41:34 -04:00
Luke Street
94c87b0912
Ignore bcctr, bclr in branch_offset
2022-09-27 17:50:59 -04:00
Richard Patel
6a3476639a
Merge pull request #40 from InusualZ/dol-improv
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Dol Library Improvement by @InusualZ
2022-06-09 07:30:46 +02:00
Richard Patel
65a68166b6
cargo fmt
2022-06-09 07:30:08 +02:00
InusualZ
d23fb912b8
disasm: fix failing tests
2022-06-08 21:33:36 -04:00
InusualZ
2de9ecc844
dol: add and use new `DolSectionType::Text`
2022-06-08 21:33:36 -04:00
InusualZ
fd5ac733d7
dol: implement helpers for virtual reads into the dol
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Co-authored-by: Richard Patel <me@terorie.dev>
2022-06-08 21:33:33 -04:00
Richard Patel
619c935dc4
Merge pull request #39 from InusualZ/improv
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General ISA Improvement
2022-06-01 18:21:07 +02:00
InusualZ
d1c809b3f6
isa: fix `ps_mr` having `frA` as argument
2022-05-31 20:25:19 -04:00
InusualZ
3c0656ee3c
isa: remove `mfspr`'s `mftdu` and `mttdu` mnemonics since there are not recognized by the metrowerks assembler
2022-05-31 20:25:19 -04:00
InusualZ
86e081fdb2
isa: fix `rlwinm`'s mnemonic `slwi` using `ME` instead of `SH` as arg
2022-05-31 20:25:19 -04:00
InusualZ
a9ae0cb8a1
isa: add `RC` modifier to the `xor` instruction
2022-05-31 20:25:15 -04:00
InusualZ
49673468fc
isa: fix `srw` argument order
2022-05-31 20:25:08 -04:00
InusualZ
2364d17751
isa: remove `RC` modifier from a bunch of instruction
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This modifier is not part of those instruction
2022-05-31 20:25:01 -04:00
InusualZ
7167807402
isa: fix `mfcr` argument
2022-05-31 20:24:54 -04:00
InusualZ
65b0966a97
isa: `b` and `bc` change modifiers order
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Previously they were `modifiers: [ AA, LK ]` and this caused problems,
because the modifiers add a char to the instruction mnemonics, but this
char is position dependant.
2022-05-31 20:24:54 -04:00
InusualZ
f4389e5edd
isa: add missing `L` arg to the `cmp` instruction family
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Also fix the mnemonics for said instruction family
2022-05-31 20:24:36 -04:00
InusualZ
ad1ec7aaa9
isa: fix paired single instruction arguments
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Argument specific to this instruction were re/named to a more dolphin
aligned name
2022-05-31 20:24:29 -04:00
InusualZ
b90b46ef8e
isa: Add missing argument to `bcctr` and `bclr`
2022-05-31 20:24:29 -04:00
InusualZ
d03a713a2b
genisa: cast unmasked signed value
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Co-authored-by: Richard Patel <me@terorie.dev>
2022-05-31 20:24:29 -04:00
InusualZ
9fd7546916
disasm: improve branch ins helpers
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`branch_dest`: Support absolute destinations
`is_branch`: Use `matches!` to improve readability
`is_direct_branch`: Added helper to better match direct branches
Co-authored-by: Richard Patel <me@terorie.dev>
2022-05-31 20:24:20 -04:00
Richard Patel
a80372c1b6
disasm: branch helpers, fix split fields
2022-04-11 00:08:39 +02:00
Richard Patel
5c4a3d01e5
add analysis/cfa.md
2022-04-11 00:07:16 +02:00
Richard Patel
4c2f5119f5
update README.md
2022-04-09 17:19:50 +02:00
Richard Patel
9dab42c364
disasm-py: add fields() method
2022-04-09 17:19:05 +02:00
Richard Patel
88c6a478e2
disasm-py: support fields
2022-04-09 16:30:48 +02:00
Richard Patel
9d5b73c0dc
fix condition register logical instructions
2022-04-09 15:33:40 +02:00
Richard Patel
70192c75a4
fix psq_st disasm
2022-04-09 02:09:44 +02:00
Richard Patel
da869222d0
update README.md
2022-04-07 06:20:53 +02:00
Richard Patel
fd94a6c493
fuzz: add threads flag
2022-04-07 06:11:03 +02:00