Luke Street
5f6e991bf4
Fix mcrf, mcrfs, mcrxr, twi, twui
2022-12-11 23:47:35 -05:00
Luke Street
aa631a33de
Fix clrlslwi decoding
2022-10-16 14:21:50 -04:00
Luke Street
4d8e473331
Support branch prediction bits, more bd mnemonics, more rlwinm mnemonics
2022-10-10 17:53:24 -04:00
Luke Street
20abce13e4
SPR names & mfspr/mtspr simplified mnemonics
2022-10-09 22:57:13 -04:00
Luke Street
ca92a30920
Improve CRBit display
2022-10-09 21:41:34 -04:00
Luke Street
94c87b0912
Ignore bcctr, bclr in branch_offset
2022-09-27 17:50:59 -04:00
6a3476639a
Merge pull request #40 from InusualZ/dol-improv
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Dol Library Improvement by @InusualZ
2022-06-09 07:30:46 +02:00
65a68166b6
cargo fmt
2022-06-09 07:30:08 +02:00
d23fb912b8
disasm: fix failing tests
2022-06-08 21:33:36 -04:00
2de9ecc844
dol: add and use new `DolSectionType::Text`
2022-06-08 21:33:36 -04:00
fd5ac733d7
dol: implement helpers for virtual reads into the dol
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Co-authored-by: Richard Patel <me@terorie.dev>
2022-06-08 21:33:33 -04:00
619c935dc4
Merge pull request #39 from InusualZ/improv
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General ISA Improvement
2022-06-01 18:21:07 +02:00
d1c809b3f6
isa: fix `ps_mr` having `frA` as argument
2022-05-31 20:25:19 -04:00
3c0656ee3c
isa: remove `mfspr`'s `mftdu` and `mttdu` mnemonics since there are not recognized by the metrowerks assembler
2022-05-31 20:25:19 -04:00
86e081fdb2
isa: fix `rlwinm`'s mnemonic `slwi` using `ME` instead of `SH` as arg
2022-05-31 20:25:19 -04:00
a9ae0cb8a1
isa: add `RC` modifier to the `xor` instruction
2022-05-31 20:25:15 -04:00
49673468fc
isa: fix `srw` argument order
2022-05-31 20:25:08 -04:00
2364d17751
isa: remove `RC` modifier from a bunch of instruction
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This modifier is not part of those instruction
2022-05-31 20:25:01 -04:00
7167807402
isa: fix `mfcr` argument
2022-05-31 20:24:54 -04:00
65b0966a97
isa: `b` and `bc` change modifiers order
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Previously they were `modifiers: [ AA, LK ]` and this caused problems,
because the modifiers add a char to the instruction mnemonics, but this
char is position dependant.
2022-05-31 20:24:54 -04:00
f4389e5edd
isa: add missing `L` arg to the `cmp` instruction family
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Also fix the mnemonics for said instruction family
2022-05-31 20:24:36 -04:00
ad1ec7aaa9
isa: fix paired single instruction arguments
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Argument specific to this instruction were re/named to a more dolphin
aligned name
2022-05-31 20:24:29 -04:00
b90b46ef8e
isa: Add missing argument to `bcctr` and `bclr`
2022-05-31 20:24:29 -04:00
d03a713a2b
genisa: cast unmasked signed value
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Co-authored-by: Richard Patel <me@terorie.dev>
2022-05-31 20:24:29 -04:00
9fd7546916
disasm: improve branch ins helpers
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`branch_dest`: Support absolute destinations
`is_branch`: Use `matches!` to improve readability
`is_direct_branch`: Added helper to better match direct branches
Co-authored-by: Richard Patel <me@terorie.dev>
2022-05-31 20:24:20 -04:00
a80372c1b6
disasm: branch helpers, fix split fields
2022-04-11 00:08:39 +02:00
5c4a3d01e5
add analysis/cfa.md
2022-04-11 00:07:16 +02:00
4c2f5119f5
update README.md
2022-04-09 17:19:50 +02:00
9dab42c364
disasm-py: add fields() method
2022-04-09 17:19:05 +02:00
88c6a478e2
disasm-py: support fields
2022-04-09 16:30:48 +02:00
9d5b73c0dc
fix condition register logical instructions
2022-04-09 15:33:40 +02:00
70192c75a4
fix psq_st disasm
2022-04-09 02:09:44 +02:00
da869222d0
update README.md
2022-04-07 06:20:53 +02:00
fd94a6c493
fuzz: add threads flag
2022-04-07 06:11:03 +02:00
9c433919fc
disasm-py: add opcode getter
2022-04-07 06:01:25 +02:00
fcad8da86b
document Python module
2022-04-07 05:58:09 +02:00
fb65bc8e7d
Merge pull request #17 from terorie/auto-gen-isa
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Auto-generate opcode detection, fields and printing
2022-04-07 05:45:28 +02:00
6548c6ec5d
bump version to 0.2.0
2022-04-07 05:45:01 +02:00
d845d6c067
bump pyo3 to 0.16
2022-04-07 05:42:55 +02:00
e667999a3d
disasm-py: temporarily remove field accessors
2022-04-07 05:40:22 +02:00
6391c87797
flow-graph: fix deprecated clap_app macro
2022-04-07 05:37:32 +02:00
4c5735e403
more flexible modifier handling
2022-04-07 05:33:38 +02:00
99c7f252f8
fix bcctr and bclr
2022-04-07 04:44:38 +02:00
16f955947e
fix bc opcode
2022-04-07 04:23:12 +02:00
b8199e678c
fix signed fields
2022-04-07 04:07:15 +02:00
9e7f70444f
update deps
2022-04-07 02:51:17 +02:00
8a57bd9eb2
more tests
2022-04-07 02:36:49 +02:00
b6ad3f4f2c
make clippy happy
2022-04-07 02:14:11 +02:00
1f5fec522a
genisa: improve codegen
2022-04-07 01:55:07 +02:00
95f93a761e
update README.md
2022-04-07 01:48:21 +02:00
Luke Street
Richard Patel
InusualZ